Effect of Wettability of Silicon and Poly Silicon on Polishing Performance

Abstract

Heavily doped poly silicon films have been widely used as gate electrodes and interconnection in MOS circuits. The shrinkage of devices below 100 nm requires more stringent and new CMP processes including poly silicon CMP. Poly silicon can be polished easily with similar pads and slurries as they are used for the planarization of silicon oxide. In this study, single crystal and poly silicon wafers were polished as a function of pH in fumed silica based slurry to understand and compare the polishing mechanism of silicon. The static and dynamic etch rates and polishing temperature were measured as a function of slurry pH (11 ~ 13) with friction forces. The single crystal silicon (bare silicon) showed higher removal rate than poly silicon. However, higher friction force was measured on poly silicon wafer than on bare wafer. The initial wettability of poly silicon with HF and without HF was treatment.