Abstract
This paper discusses the effect of process induced variations in copper transmission lines on their electrical performance up to 110 GHz, fabricated by semi-additive processes (SAP) for redistribution layers (RDL). The motivation of this research is to quantify the effect of the process variations in RDL traces by SAP, thus enabling electrical designers to reduce design iterations to achieve precise impedance control. The paper will primarily discuss results from analytical electromagnetic (EM) modeling, full-wave EM modeling and initial frequency domain characterization. The escalating demand for high bandwidth electronics, has driven the adoption of wide bus interconnections between logic and memory ICs. Wireless communication protocols in smartphones, automotive and IoT systems also require high frequency signal transmission (60-100 GHz) in the near future. Both the high speed and high frequency signals impose major challenges, in precise circuit definition, in addition to the low cost and low power consumption constraints. At such fine feature sizes, any imperfections in the SAP technology, such as surface roughness of polymer dielectrics, tapered cross sections of the traces and tapered microvias in polymer dielectrics, impact the impedance and signal loss, and these effects need to be quantified electrically. This paper presents modeling research to understand the effect of different process induced variations on electrical performance of transmission lines on glass interposers, correlated with the measured data in published literature.
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