Effect of TiN Liner Thickness on the Electrical Characteristics and Reliability of CuGeS2/GeS2-Based Selector Device

Abstract

Three-dimensional (3D) cross-point memory technology has attracted much attention for the future ultrahigh-density memory applications [1]. However, when the resistor (1R) without the selector device is applied to the 3D crosspoint memory cell, the power consumption is extrememly high due to the leakage current, which is a major obstacle in large-scale memory operation. To supress the leakage current, it has been proposed that a selector (1S) is stacked vertically with a resistor (1R). The selector device should have ultralow leakage current and high selectivity to avoid any undesired operation of the unselected memory cells. Among the various selector devices, mixed-ionic-electronic-conduction (MIEC) type selector has been intensively researched as it showed abrupt resisitive switching through the formation and rupture of the metal filaments, resulting in high selectivity (~ 104) and low leakage current (~ 10 pA) [2]. However, the selector device using metal filaments suffer from reliability issues such as endurance failure due to the accumulation of excessive amounts of metal ions in the switching layer [3]. Therefore, it is important to find an efficient solution that improves selectivity and endurance characteristics by controlling the diffusion of excessive amounts of metal ions.In this work, we demonstrated the selector device adopting TiN liner as a diffusion barrier to control the diffusion of Cu into the switching layer. The effects of the TiN liner thickness on the reliability and electrical chacateristics (i.e. Vth, Vh, selectivity) of the GeS2-based selector device were investigated in detail. The schematic image of a selector device without a TiN liner, with a 1-nm-thick TiN liner, and with a 2-nm-thick TiN liner were demonstrated, as shown in Fig. 1(a-c). The GeS2 based selector device has a structure of the plug-type bottom W electrode, 5-nm-thick GeS2 switching layer, 0 to 2 nm-thick TiN liner, 5-nm-thick CuGeS2 ion supply layer, and 50-nm-thick Pt top electrode. A typical DC I-V curve of GeS2 based selector device without a TiN liner exhibited a threshold voltage (V th) of ~ 0.60 V, a holding voltage (V h) of ~ 0.00 V, and a selectivity of ~ 4.59 × 105, as shown in Fig. 1(d). Moreover, a typical DC I-V curve of GeS2 based selector device with a 1-nm-thick TiN liner exhibited a threshold voltage (V th) of ~ 0.75 V, a holding voltage (V h) of ~ 0.15 V, and a selectivity of ~ 1.14 × 106, as shown in Fig. 1(e). Lastly, a typical DC I-V curve of GeS2 based selector device with a 2-nm-thick TiN liner exhibited a threshold voltage (V th) of ~ 1.00 V, a holding voltage (V h) of ~ 0.25 V, and a selectivity of ~ 3.10 × 106, as shown in Fig. 1(f). These results indicated that the threshold voltage (V th), the holding voltage (V h), and the selectivity increased as the thickness of the TiN liner increased. Afterwards, the dependence of the endurance characteristics according to the thickness of the TiN liner of the selector device was evaluated. GeS2 based selector device without a TiN liner demonstrated endurance cycles of ~ 5 × 105, as shown in Fig. 1 (g). Moreover, the endurance characteristic of GeS2 based selector device with 1-nm-thick TiN liner demonstrated endurance cycles of ~ 5 × 106, as shown in Fig. 1 (h). Lastly, the endurance characteristic of GeS2 based selector device with 2-nm-thick TiN liner demonstrated endurance cycles of ~ 1 × 106, as shown in Fig. 1 (i). This result suggested that the optimal liner thickness for the diffusion of an adequate amount of Cu is important to achieve electrically reliable switching characteristics. In the presentation, the effects of TiN liner thickness on Cu diffusion will be assessed in detail using transmission electron microscopy (TEM), energy dispersive spectroscopy (EDS) elemental mapping, and line profile. Reference [1] Geoffrey W. Burr. et al. J. Vac. Sci. Technol. B 32, 040802 (2014)[2] K. Virwani et al., IEDM Tech. Dig. 2012, 2.7.[3] Song, J. et al. IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 64, NO. 11, 2017 Acknowledgement This research was supported by the MOTIE (Ministry of Trade, Industry & Energy (10068055) and KSRC (Korea Semiconductor Research Consortium) support program for the development of the future semiconductor device. Figure 1