Effect of temperature and voltage sweep rate on [formula omitted] characteristics of MIS capacitors

Abstract

The capacitance ( C) vs voltage ( V) characteristics of metal-insulator-semiconductor (MIS) capacitors have been measured, with temperature and sweep rate as parametric variables. The steady-state portions of the curves are seen to be strongly temperature dependent, while the non-steady-state portion of the curves exhibit pronounced hysteresis. The striking features of this portion of the curves is that the amount of hysteresis is only slightly dependent on temperature and sweep rate. Generally speaking, the curves are in good agreement with theoretical predictions. At relatively high temperature and high sweep rates, the non-steady-state portion of the C− V curve exhibits a minimum on the negative-going voltage cycle (for devices with n-type substrates). This phemenon is explained in terms of the combined effects of surface and bulk generation in the semiconductor. During the non-steady-state positive-going voltage cycle the C− V characteristic overshoots the steady-state inversion C − V characteristic. This is explained in terms of the necessity of having the Fermi level of the semiconductor slightly above the level of the uppermost-filled trap, in order that there will be a net flow of current into the interface traps.