Effect of Substrate Parasitic Inductance on Silicon-Based Transmission Lines and On-Chip Inductors

Abstract

We demonstrate that, in addition to the conventional high-order parasitic effects such as skin and proximity effect, as well as substrate coupling, a novel term of substrate parasitic inductance needs to be introduced in the equivalent circuit for silicon-based transmission lines and on-chip spiral inductors in order to fully describe the nonlinear features of substrate-characteristic functions at a high frequency. The present model is verified for inductors fabricated using a 0.18-mum CMOS process.