Effect of STI, DSL and SMT on f T and noise-figure in 30 nm gate length NMOSFET

Abstract

The effect of stress, in particular, shallow trench isolation, dual stress liner (DSL) and stress memorisation technique (SMT) on unity gain cut-off frequency (f T) and noise-figure (NF) of 30 nm gate length nMetal-oxide-semiconductor field-effect transistors (nMOSFET) has been studied, using extensive process and device simulations. The simulations include many of the latest process steps, like high-K dielectric, metal gate, laser annealing and stress engineering aspects. The results have been compared with the hypothetical MOSFET where the device is set to be stress-free. Simulation results show that DSL improves both f T and NF whereas SMT technique improves f T and degrades the noise performance.