Abstract

Silicon Carbide (SiC) is a strong contender as a material of choice for high power high temperature electronic circuit applications. The favorable properties of SiC such as a wide bandgap, high thermal conductivity, high bulk mobility and high critical breakdown fields enable the development of high power devices that can operate at temperatures as high as 400°C. The availability of Silicon Dioxide (SiO 2 ) as a natural oxide for SiC has led to the development of power DMOSFET devices which can potentially outperform Silicon IGBTs for high voltage power converter and switching applications. 4H-SiC MOSFETs suffer from the presence of very high densities of traps at the SiC-SiO2 interface. These traps degrade the performance of SiC devices by reducing the surface mobility via Coulombic scattering, and by reducing the inversion charge by trapping the inversion layer mobile carriers. Further, to counter the effect of acceptor type interface traps in n-channel MOSFETs, manufacturers need to include sufficiently high densities of positive fixed charges at the interface. The situation in 4H-SiC MOS devices is further complicated by the presence of oxide traps in the dielectric which has led to threshold voltage instability. This paper aims to explore the effect of these charges on the transport characteristics of 4H-SiC MOSFETs by evaluating the effect of random distribution of these charges.

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