Abstract

We studied the effect of P+ region design on the simulation and fabrication of 6500 V 4H-SiC JBS diodes. There existed a deviation of 0.9 μm in P+ region design between theoretical simulation and actual device during the fabrication. We mainly attributed this change of P+ region design to the implantation spreading and the mask etching processes. The simulation fitted well with the measured results considering the broadening of 0.9 μm of P+ region. According to the analysis, we calibrated the simulation and successfully fabricated the 6500 V/40A 4H-SiC JBS diodes. The simulation fitted very well with the performance of fabricated device.

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