Abstract
Polysilicon thin film transistors have broad application prospects in high-performance flat panel displays and flexible wearable devices due to their high carrier mobility and good stability. However, due to process conditions and other reasons, there are traps inside, and under some electrical stress conditions, its electrical properties will degrade. Here we report the changes in electrical characteristics of p-type polysilicon thin film transistors with stress time at a negative gate voltage of -20V and a temperature of 60°C. It is obtained that the transfer characteristics of the p-type polysilicon thin film transistor move in the negative direction with the increase of Negative Bias Temperature Instability time, and with the increase of SS degradation, and the total trap state inside it is calculated by SS, which provides a theoretical basis for improving the reliability of the device.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.