Effect of Halo structure variations on the threshold voltage of a 22 nm gate length NMOS transistor

Abstract

This paper reports on the effects of the Halo structure variations on threshold voltage (Vth) in a 22nm gate length high-k/metal gate planar NMOS transistor. Since the Vth is one of the important physical parameter for determining the functionality of complementary metal-oxide–semiconductor device, this experiment will focus on finding the best combination on process parameter to achieve the best value of Vth. The Halo structure variable process parameters are the Halo implantation dose, the Halo implantation tilting angle, the Source/Drain implantation dose and the compensation implantation dose. The design of the planar device consists of a combination of high permittivity material (high-k) and a metal gate. Titanium dioxide was used as the high-k material instead of the traditional SiO2 dielectric and tungsten silicide was used as the metal gate. The optimization process was executed using Taguchi's L9 array to obtain a robust design. Taguchi's Nominal-the-Best signal-to-noise ratio was used in an effort to minimize the variance of Vth. The results show that the Vth values have least variance and the mean value can be adjusted to 0.289V±12.7% which is in line with projections made by the International Technology Roadmap for Semiconductors.