Effect of gate voltage polarity on the ionic liquid gating behavior of NdNiO3/NdGaO3 heterostructures

Yongqi Dong,Dillon D Fong,Hua Zhou,Haoran Xu,Chen Gao,Zhenlin Luo,Wenbin Wu

doi:10.1063/1.4983617

Abstract

The effect of gate voltage polarity on the behavior of NdNiO3 epitaxial thin films during ionic liquid gating is studied using in situ synchrotron X-ray techniques. We show that while negative biases have no discernible effect on the structure or composition of the films, large positive gate voltages result in the injection of a large concentration of oxygen vacancies (∼3%) and pronounced lattice expansion (0.17%) in addition to a 1000-fold increase in sheet resistance at room temperature. Despite the creation of large defect densities, the heterostructures exhibit a largely reversible switching behavior when sufficient time is provided for the vacancies to migrate in and out of the thin film surface. The results confirm that electrostatic gating takes place at negative gate voltages for p-type complex oxides while positive voltages favor the electrochemical reduction of Ni3+. Switching between positive and negative gate voltages therefore involves a combination of electronic and ionic doping processes th...

Highlights

Smaller rare-earth cations give rise to larger octahedral tilting and increased critical temperatures such that T MI ranges from 130 K for R = Pr to 430 K for R = Eu
This sensitivity implies that T MI can be modulated in nickelate heterostructures through both the epitaxial strain[9,10,11,12,13,14,15] and the degree of orthorhombicity induced by the substrate.[16,17]
While epitaxial growth techniques can be used to vary the metal-insulator transition (MIT), electrostatic doping in a field-effect transistor geometry permits the dynamic and reversible manipulation of the in-plane transport characteristics, regardless of whether the thin film oxide exhibits a correlated electron behavior.[18]

Summary

Introduction

The scattered intensities along the specular rod are shown, proceeding from 0 V to more negative biases; each scan was performed 10 min after changing the gate voltage.

Results

Conclusion