Effect of extreme surface roughness on the electrical characteristics of ultra-thin gate oxides

Abstract

The effect of extreme surface roughness on the electrical characteristics and gate oxide integrity of MOS (metal–oxide–semiconductor) capacitors with ultra-thin SiO 2 layers is reported. The Si surface roughness is increased by NH 4OH dips prior to gate oxidation. The Si and SiO 2 surfaces are then characterized by lightscattering Haze and AFM measurements. Electrical measurements are undertaken on MOS capacitors with a 6.4 and 4.2 nm gate oxide. Results are compared for wafers with RMS roughness of respectively 0.09 and 9 nm. It is shown that the tunneling current is increased in case of extreme Si surface roughness and does not follow the simple Fowler–Nordheim expression. Quantum oscillations in 4.2 nm oxides are also shown to be much damped by Si/SiO 2 interface roughness. The effect of surface roughness on gate oxide reliability is investigated through charge-to-breakdown Q BD measurements performed at constant current and constant voltage stress. It is shown that intrinsic Q BD values determined by constant current stressing are higher for oxides on rough surfaces in case of substrate injection while the opposite trend is observed in case of gate injection. All results can be consistently explained by considering the effect of a distribution of oxide thicknesses on the gate oxide properties.