Effect of Channel Width Shortening on the Stability of a-Si:H/nc-Si:H Bilayer Thin-Film Transistors

Abstract

The static bias-stress-induced degradation of hydrogenated amorphous/nanocrystalline silicon bilayer bottom-gate thin-film transistors is investigated by monitoring the turn-on voltage (V on) and on-state current (I on) in the linear region of operation. Devices of constant channel length 10 mum and channel width varying from 3 to 400 mum are compared. The experimental results demonstrate that the device degradation is channel-width dependent. In wide channel devices, substantial degradation of V on is observed, attributed to electron injection into the gate dielectric, followed by I on reduction due to carrier scattering by the stress-induced gate insulator trapped charge. With shrinking the channel width down to 3 mum, the device stability is substantially improved due to the possible reduction of the electron thermal velocity during stress or due to the gate insulator quality uniformity over small dimensions.