Abstract
We have demonstrated 4H-SiC super junction V-groove MOSFETs (SJ-VMOSFETs) with an extremely low specific on-resistance ($R_{on, sp}$) of $0.67 \mathrm{m}\Omega$ cm2 and with a high blocking voltage (V B ) of 1170 V [1]. We have adopted double reduced surface junction termination extensions (DR-JTEs) as a new edge termination for the SJ-VMOSFETs in order to deplete the highly doped drift layer and current spreading layer (CSL) over 1x10$^{17} cm^{-3}$. We evaluated the process robustness of the DRJTEs and other conventional edge terminations by using TCAD simulation.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
