Early voltage and intrinsic voltage gain in vertical nanowire-TFETs as a function of temperature

Abstract

The goal of this work is to study parameters related to the analog performance of tunnel field effect transistors (TFETs). The obtained results have been analyzed in terms of temperature variation (ranging from 25°C to 150°C) and source composition (Sh-xGex and 100% Si). The first part is focused on characteristic curves of the drain current as a function of gate voltage and drain voltage. Next step highlights the Early voltage and the ratio of transconductance and drain current, since these parameters lead to the extraction of the intrinsic voltage gain. Performing a temperature analysis, different trends have been obtained depending on the device. For instance, devices with 100% Si source and non-abrupt junction profile present the lowest gain at room temperature, but the best results for temperatures higher than 100°C. The suitability of TFETs for analog applications has been discussed based on these results.