Abstract
With growing heterogeneity and complexity in applications, demand to design an energy-efficient and fast computing system in multi-core architecture has heightened. This paper presents a regression-based dynamic voltage frequency scaling model which studies and utilizes workload characteristics to obtain optimal voltage–frequency (v–f) settings. The proposed framework leverages the workload profile information together with power constraints to compute the best-suited voltage–frequency (v–f) settings to (a) maintain global power budget at chip-level, (b) maximize performance while enforcing power constraints at the per-core level. The presented algorithm works in conjunction with the workload characterizer and senses change in application requirements and apply the knowledge to select the next setting for the core. Our results when compared with two state-of-the-art algorithms MaxBIPS and TPEq achieve the average power reduction of 33% and 25% respectively across 32-core architecture for PARSEC benchmarks.
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