Dynamic Slingshot Operation for Low-Operation- Voltage Nanoelectromechanical (NEM) Memory Switches

Min Hee Kang,Woo Young Choi

doi:10.1109/access.2020.2985105

Min Hee Kang, Woo Young Choi

Open Access

https://doi.org/10.1109/access.2020.2985105

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Abstract

A dynamic slingshot pull-in operation is presented by using the influence of inertia and damping on the nanoelectromechanical (NEM) memory switch operation. To confirm the validity of the proposed idea, a finite element analysis (FEA) simulation, that reflects the actual cantilever beam structure, is performed, and an analytical one-dimensional (1D), the parallel plate model is tested. According to the analytical and FEA data, the dynamic slingshot pull-in voltage can be achieved ~0.78 times and ~0.73 times lower than conventional pull-in voltage under near-vacuum conditions, respectively. It is also shown that the proposed dynamic slingshot operation is more effective for lowering operation voltage ( $V_{\mathrm {DD}}$ ) and boosting the chip density of complementary-metal-oxide-semiconductor (CMOS)- NEM hybrid reconfigurable logic (RL) circuits than the static slingshot operation.

Highlights

Conventional complementary-metal-oxide-semiconductoronly (CMOS-only) reconfigurable logic (RL) circuits, a well-known example of which is a field-programmable gate array (FPGA), suffer from some fundamental limitations including, low chip density, high energy consumption, and low speed [1], [2]. These limitations mainly stem from the fact that routing blocks (RBs) that determine data signal paths consist of CMOS devices horizontally integrated on a silicon substrate suffering from high leakage current and high resistance
It should be noted that the VDD of the NEM memory switch reaches the sub-1 V region, which is lower than the VDD of the 65 nm CMOS node using the proposed dynamic slingshot operation
It is confirmed that the proposed dynamic slingshot operation is superior to conventional pull-in and static slingshot operations in terms of VDD and size reduction

Summary

Introduction

Conventional complementary-metal-oxide-semiconductoronly (CMOS-only) reconfigurable logic (RL) circuits, a well-known example of which is a field-programmable gate array (FPGA), suffer from some fundamental limitations including, low chip density, high energy consumption, and low speed [1], [2]. This study proposes a dynamic slingshot operation for further reduction of Vp, which eventually lowers the overall VDD of M3D CMOS-NEM hybrid RL circuits. 2(b) and 2(c) compare the proposed dynamic slingshot operation with the previous static one of a NEM memory switch.

Results

Conclusion