Dynamic electrostatic-discharge path investigation relied on different impact energies in metal–oxide–semiconductor circuits

Abstract

Gate-grounded n-channel metal–oxide–semiconductor (GGNMOS) devices have been widely implemented as power clamps to protect semiconductor devices from electrostatic discharge stress owing to their simple construction, easy triggering, and low power dissipation. We present a novel I–V characterization of the GGNMOS used as the power clamp in complementary metal–oxide–semiconductor circuits as a result of switching the ESD paths under different impact energies. This special effect could cause an unexpected latch-up or pre-failure phenomenon in some applications with relatively large capacitances from power supply to power ground, and thus should be urgently analyzed and resolved. Transmission-line-pulse, human-body-modal, and light-emission tests were performed to explore the root cause.