Dynamic bootstrapped shift register for smart sensor arrays

Abstract

In this paper we demonstrate the operation of a dynamic serial-to-parallel shiftregister, with only four transistors per stage. A bootstrap capacitor is used toovercome the problem of transistor threshold voltage drop. We will refer to thisnew logic family as non-ratioed bootstrap logic (NRBL). Simulation results arepresented showing the operation of the shift register along with Monte Carloanalysis to demonstrate the robustness of the circuit. A key application area for thisnovel shift register is in the addressing and read out of high-density smart sensorarrays.