Abstract
A wide range, low jitter Duty Cycle Corrector (DCC) based on continuous-time integrator is proposed. It introduces little added jitter in the sampling edge, which make it good candidate for pipelined ADC application. The circuit is implemented in CMOS 0.35µm 2P4M Mixed Signal process. The experimental results show the circuit can work for a wide frequency range from 500kHz to 280MHz, with a correction error within 50%±1% under 200MHz, and the acceptable duty cycle can be as wide as 1-99% for low frequency inputs.
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