Dummy Poly Gate Removal Process Optimization with Pulsing Plasma Application

Abstract

High-K metal gate (HKMG) approach has been introduced to enhance the device performance via lowering device current leakage. Dummy poly gate removal (DPGR) process is introduced in HKMG process to form the metal gate with different work functions for n/p-MOS. However, the introduction of this technology does bring many new challenges to process, especially for etch process. Before the second dummy gate is removed, the first dummy gate has been replaced with metal materials. This definitely requires soft etch process to avoid the damage of gate channel and the first metal gate while meet all the physical targets. In this paper, we leveraged synchronous pulsing/source pulsing scheme to fulfill the precise geometry definition and achieve the requirement of device performance.