Drain Current Characteristics of Ferroelectric Gate-All-Around Si Nanowire Transistors Based on Drift/Diffusion Transport Theory

Abstract

The drain current vs gate voltage (ID–VG) and drain current vs drain voltage (ID–VD) characteristics of ferroelectric gate-all-around Si nanowire transistors are derived using the drift/diffusion transport theory. It is pointed out that the nonsaturated polarization in the ferroelectric film, which occurs near the drain region in the channel owing to the influence of the applied drain voltage, plays an important role in the calculation of the drain current as well as the polarization near the source region, and a graphical method using analytical expressions for the minor polarization hysteresis loops is presented to calculate the mobile charge density in the nanowire. By numerical analysis, the gate voltage range suitable for memory operation is determined in Si nanowire transistors with ferroelectric poly(vinylidene fluoride–trifluoroethylene) [P(VDF–TrFE)] gate films.