DPAM: A Demand-Based Page-Level Address Mappings Algorithm in Flash Memory for Smart Industrial Edge Devices

Abstract

Edge computing brings data storage closer to the location where it is needed. Therefore, the edge devices, especially smart industrial edge devices, require higher storage systems. NAND flash memory has the advantages of small size, high speed, and strong shock resistance, which is widely used in various storage systems, providing a good choice for edge devices. NAND flash has unique physical characteristics, such as “out-of-place updates” and “prewrite erasure,” therefore, the traditional address mapping methods require improvement. This article presents a novel demand-based page-level address mapping algorithm called DPAM. The goal of DPAM is to provide efficient address translation by using a smaller address mapping table. Due to the high service cost of block-level address mapping and hybrid address mapping, a page-level address mapping scheme is proposed. The algorithm is implemented and tested on the flash simulation platform FlashSim. The results indicate that our algorithm provides improvements of 7.11% for the hit ratio and 7% for the number of block erasures compared with other approaches.