Abstract

In this paper we introduce a lithography method for AZ5214E resist that adds three dimensionality into the standard optical lithography. With the method we are able to define, e.g., shallow air bridges and metal cross-overs in a single lithography step thus simplifying the device prosessing considerably. The main aim of the original process is towards metallization of nano- and micrometer scale vertical structures with device height of about 1 micrometers or less. Our method for doubly patternable planarizing lithography with AZ5214E resist relies on utilizing optically sensitive AZ5214E in both planarizing layer and top layer in a way that the planarizing layer is patternable separately. The planarizing layer is patterned in the image reversal mode of the resist, and the associated lithography steps are integrated with top layer processing such that the overall lithography is kept simple and reproducible. The typical thickness of the planarizing layer is 1,4 μm, which forms the upper limit for the vertical height of structures defined with the planarizing layer. We demonstrate the applicability of the doubly patternable lithography with an implementation to our heterojunction bipolar transistor process. The process included air bridged metal cross overs and air bridges for smooth entrance into the transistor active area. Finally, the applicability of our process towards small 3D structures is briefly discussed.

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