Abstract
Dataflow architectures can be used advantageously for computation-oriented applications that exhibit a fine grain parallelism. The implementation of the dataflow computer architecture depends on the form of execution of the dataflow program instructions, which is implemented as a process of receiving, processing and transmission of data tokens. The architecture described in this paper belongs to a class of dynamic dataflow architectures with direct operand matching. The concept of direct operand matching represents the elimination of the costly process (in terms of computing time) related to associative searching of the operands. This process is associated with the processing units of the proposed system. The processing units are designed as a dynamic multifunction pipelined unit of five segments, Load-Fetch-Operate-Matching-Copy. This pipeline stages handle processing of operand matching of dataflow operators. From the many types of operators, this paper describes microprogram managing for double input operators.
Highlights
One of the solutions to the problem of reaching higher computer system performance is the concept of high performance parallel computer systems' architecture
The structural organization (Fig. 4) of the DF-KPI computer architecture model consists of the following components: Coordinating Processors (CP) are intended to manage, coordinate and process instructions of the data flow program, based on the presence of their operands, which are enabled at the CP.DI input port of the coordinating processor - either from its CP.DO output port or from the CP.DO output ports of other CPs through an interconnection network, or from a Data Queue Unit and from the Frame Store
The data flow program instruction represented by a data token is stored in the Instruction Store at the address defined by DST field
Summary
One of the solutions to the problem of reaching higher computer system performance is the concept of high performance parallel computer systems' architecture. Computer systems based on the von Neumann computer principle try to solve these requirements by increasing the performance of particular computer segments. Possibilities of this kind of speed-up are conditioned by the technological potential [5], [6], [7], [12]. Single Input Operators of DK KPI System appropriate architecture design, for example: reconfigurable chip area for processing units, interconnection networks, as are the hypercube, pyramid etc., and by elimination of redundant calculations at the level of program to data flow graph translation, making use of an efficient computation management microprogram with a well designed operand matching algorithm
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