Abstract
Due to the serial pattern data transfer in electron beam lithography (EBL), there is a larger spectrum of dynamic overlay errors as compared to projection optical or extreme ultraviolet lithography. A good EBL overlay mark needs to be of high resolution, i.e., small enough size to capture the details of temporally and spatially distributed overlay error variations across a semiconductor chip. A small, one critical dimension unit or about 10–50 nm size, dot exposed in successive lithography layers is the smallest size overlay mark. This overlay mark size allows for multiple marks to be placed across the chip to measure and analyze spatial variation of the overlay errors. If the single dot is replicated into a small matrix of dots, additional overlay error information can be obtained from local variations within the matrix. Analysis of the time-dependent variations of the local overlay errors in these dot-matrix marks is useful in determining the frequency of sources of overlay errors affecting the different lithography layers.
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