Abstract
Tunnel field-effect transistors (TFETs) have attracted immense interest as a promising alternative to complementary metal–oxide semiconductors for low-power-consumption applications. However, conventional TFETs introduce both random dopant fluctuations and ambipolar current issues at negative gate voltages for sub-6-nm technology nodes. In this study, we address the performance of charge plasma-driven doping-less TFETs, including sub-3-nm thick compact drain (CD) geometry/SiGe-channel/Ge source layers for suitable bandgap engineering. An ultrathin CD frame and heteromaterials are adopted for use as channels/sources to improve the ambipolarity and ON-state features, respectively. Simulation demonstrates a clear reduction in the ambipolar current from 3.3 × 10−14 to 3.0 × 10−17 A at gate (VG)/drain (VD) voltages of −1.5/1.0 V and an enhancement in the ON-current from 2.0 × 10−5 to 8.6 × 10−5 A at VG = 1.5 and VD = 1.0 V, compared with conventional TFETs. In addition, diverse fabrication-friendly metals applicable to industry fieldwork sites are tested to determine how the metal work functions influence the outputs. The use of Ti/W/Ni as the drain/channel/source materials, respectively, yields an enhanced ambipolar current of 1.2 × 10−20 A and an ON-current of 3.9 × 10−5 A.
Highlights
Scitation.org/journal/adv the scaling of conventional Tunnel field-effect transistors (TFETs) is restricted by the presence of random dopant fluctuations6–8 (RDFs); this was found to cause a variation in the threshold voltage (VT) and subthreshold swing (SS) during the doping and activation process of drain/source regions frequently adopted in conventional TFETs
Conventional TFETs resulted in a higher ambipolar current mainly because of the inherent band-to-band tunneling (BTBT) phenomena between the drain/channel in the gate voltage (VG) range being lower than 0 V, even though an ambipolar current9 is strongly correlated with stable device operation
Ambipolar current in DL-TFETs can be suppressed via a drain-engineering process, for example, insertion of a metal splint into the drain region toward the gate to increase the length between the gate/drain and adjustment of the drain metal work function
Summary
Scitation.org/journal/adv the scaling of conventional TFETs is restricted by the presence of random dopant fluctuations6–8 (RDFs); this was found to cause a variation in the threshold voltage (VT) and SS during the doping and activation process of drain/source regions frequently adopted in conventional TFETs. Ambipolar current in DL-TFETs can be suppressed via a drain-engineering process, for example, insertion of a metal splint into the drain region toward the gate to increase the length between the gate/drain and adjustment of the drain metal work function.12–16 The recent approach for enhancing the ON-current in DL-TFETs is to utilize a source-engineering concept, including heterojunction materials with a lower bandgap energy (EG) than silicon materials in the source region.17–21 both conventional approaches have reflected the huge fabrication cost requirements due to multiple lithography–etch–lithography–etch process steps and difficulty in the current sub-10-nm technology node.22,23
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