Dislocation-Induced Punchthrough Causing Drain-to-Source Leakage Current in Power VD MOSFET Structures

Abstract

A detailed characterization of the leakage in semiconductor devices is essential for proper adjustment of the manufacturing process in order to eliminate the leakage. Subsurface punchthrough was determined as the leakage current mechanism in the power vertical double-diffused metal–oxide–semiconductor field-effect-transistor, and the quadratic dependence of the drain current was confirmed for the leakage caused by the punchthrough. A failure analysis revealed a large number of dislocations located in the corners of transistor cells. The majority of the detected dislocations were electrically inactive. Dislocation depth measurement indicated that only a small number of the dislocations penetrated deep into the channel, i.e., penetrated from source area to the boron-doped p− transistor channel. The transistor channel shortening caused by the enhanced phosphorus diffusion along the dislocations was determined as the root cause of the leakage. The diffusion spikes of the phosphorus atoms lengthened the n+ source layer, and the interface of the n+ and p− layer was shifted into the transistor channel at the site of the dislocation. Manufacturing process experiments related to the channel lengthening and the channel doping confirmed the theory of the dislocation-induced channel shortening. The occurrence of dislocations was attributed to the surface stress induced by the improper conditions of oxide growing and plasma etching in the affected regions.