Abstract
AbstractThis paper reports on our studies of dislocation formation in trench capacitor DRAM structures. Experimental results on process dependence and layout dependence of dislocation formation in cell layouts with minimum feature sizes from 0.5 μm to 0.25 μm are compared to two-dimensional stress simulations. It is shown that the nucleation and spatial distribution of dislocations can be explained by considering stress fields which are influenced by the overlay of deep trench and shallow trench isolation structures.
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