Discussion on the Figures of Merit of Identified Traps Located in the Si Film: Surface Versus Volume Trap Densities

Abstract

In this work a discussion on the estimated volume trap densities (NT) compared to surface traps densities (Neff) related to identified traps in the Si fin of Si/SiGe superlattice I/O n-channel FinFETs using low frequency noise spectroscopy is made. The investigated devices present a fin width of 10 nm, a fin height of 10 nm and four fins in parallel, leading to an equivalent channel width of 120 nm. The equivalent oxide thickness (EOT) is 5.6 nm. More details on the device fabrication and experimental setup may be found in [1,2]. The noise spectra and the estimated surface traps densities are provided in [3]. In this work, focus is only on the identified T4 trap, for which using the linear dependence that should exist between A0i and t0i related to the same trap, without any other assumption, a surface trap density of 2.8∙1012cm-2 is obtained [3]. It should be noted that from the 1/f flat-band noise level an interface trap density value of about 1.9∙1018 eV-1cm-3 is obtained at 300 K.However, as the traps in the Si film are related to a volume phenomenon, two methodologies to estimate the volume trap densities are employed: one using the relationship between the surface trap density and volume trap densitiy [4], where B is a coefficient estimated to be 1/3 [4,5]; and a second one from the temperature (T) evolution at fixed frequency of the Lorentzian plateau level associated to the same trap (from equation 34 in [4]). Using the first method leads to a volume trap density of T4 of about 1.7∙1019 cm-3.The second method consists to use the maximum of the measured Svg_Lor(f 0,T) dependence with temperature. Indeed, the Svg_Lor(f 0,T) of Lorentzians associated to the same trap are proportional with ti(T)/{1 + [2pf 0ti(T)]2}. For a given frequency f 0, if 2pf 0ti(T) ≫ 1, SVg_Lor(f 0,T) ∝ ti(T)]-1, and SVg_Lor(f 0,T) increases with increasing temperature because ti decreases. If 2pf 0ti(T) ≪ 1, then SVg_Lor(f 0,T) ∝ ti(T) and SVg_Lor(f 0,T) decreases with increasing temperature, as explained in detail in [4]. The evolution of the Svg_Lor(f 0,T)∙f 0 in a temperature range where T4 traps are active is illustrated in Figure 1 and presents a bell-shaped behavior, as expected. Using this method, volume trap densities of about 1.25∙1018 cm-3 for f 0 = 10 kHz and of about 1.1∙1018 cm-3 for f 0 = 14 kHz are obtained. It may be observed that the estimated volume trap densities of the T4 defect are about one decade lower than when using the first method. This overestimation by the first method is related to the fact that the theoretical B coefficient was determined for conventional planar devices with one gate [4,5]. Moreover, it may be noticed that the second method is dependent on the fixed f 0 selected.The paper will present a discussion with more details, considering all identified traps in [1] and considering additional new low frequency noise spectroscopy results.References :[1] Hellings, H. Mertens, A. Subirats, E. Simoen, T. Schram, L.-A. Ragnarsson et al., “Si/SiGe superlattice I/O finFETs in a vertically-stacked Gate-All-Around horizontal Nanowire Technology”, in Tech. Dig. Symp. on VLSI Technology, The IEEE New York, 2018, p.p. 85-86, DOI: 10.1109/VLSIT.2018.8510654.[2] Boudier, B. Cretu, E. Simoen, R. Carin, A. Veloso, N. Collaert, and A. Thean, “Low frequency noise assessment in n- and p-channel sub-10 nm triple-gate FinFETs: Part I: Theory and methodology,” Solid State Electron., vol. 128, pp. 102-108, 2017, DOI: 10.1016/j.sse.2016.10.012.[3] Boudier, B. Cretu, E. Simoen, G. Hellings, T. Schram, H. Mertens and D. Linten, “Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs”, In Proceedings of EUROSOI-ULIS’2019.[4] Lukyanchikova, “Noise and Fluctuations Control in Electronic Device”, edited by A. Balandin, American Scientific, Riverside, CA, 2002, pp. 201-233.[5] Yau and C-T. Sah, “Theory and experiments of low-frequency generation-recombination noise in MOS transistors”, IEEE Trans. Electron Dev., 1969, vol.16, pp. 170-177.Figure 1 : SVg_Lor(f 0,T)·f 0 versus temperature for the T4 trap identified in [3]; on the secondary Oy axis the characteristic frequency f 0i of the Lorentzians is displayed in function of temperature. Figure 1