Discrete Time Analyses of Nonuniform Sampling First- and Second-Order Digital Phase Lock Loops

Abstract

The present paper considers discrete time analyses of firstand second-order digital phase lock loops. These loops are characterized by the fact that they track the zero crossings of the incoming signal; consequently, the sampling intervals are nonuniform. The firstorder loop is analyzed for phase step and frequency step inputs; mean time to skip cycle is also considered. For phase step input, approximate expressions are obtained for the steady-state phase error probability density and phase error variance, the second of which leads directly to a theoretical prediction of threshold. The second-order loop is analyzed for frequency step input. Approximate expressions for the steady-state phase error probability density, phase error variance, and a theoretical prediction of threshold are obtained. The analyses are confirmed by numerical results and simulation.