Abstract

In this work, DC and transient characteristics of a 4 diode string utilizing triple-well technologies as a VDD-VSS clamp device for ESD protection are analyzed in detail based on 2-dimensional device and mixed-mode simulations. It is shown that there exists parasitic pnp bipolar transistor action in this device leading to a sudden increase in DC substrate leakage if anode bias is getting high. Through transient simulations for a 2000 V PS-mode HBM ESD discharge event, it is shown that the dominant discharge path is the one formed by a parasitic pnpn thyristor and a parasitic npn bipolar transistor in series. Percentage ratios of the various current components regarding the anode current at its current peaking are provided. The mechanisms involved in ESD discharge inside the diode-string clamp utilizing triple-well technologies are explained in detail, which has never been done anywhere in the literature based on simulations or measurements.

Highlights

  • CMOS chips are vulnerable to electrostatic discharge (ESD) due to thin gate oxides used, and protection devices are required at input pads

  • 2.1% of the Anode current flows out to the Subr terminal. We note that this transient mechanism relating ESD discharge in the diode string clamphas never been explained in detail anywhere in the literature based on simulations or measurements

  • Based on 2-D device simulations and mixed-mode transient simulations, we showed that pnpn thyristor action inside the diode string clamp dominates the PS-mode human-body model (HBM) discharge transient of a CMOS chip equipped with a diode ESD protection scheme utilizing a triple-well diode-string clamp

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Summary

Introduction

CMOS chips are vulnerable to electrostatic discharge (ESD) due to thin gate oxides used, and protection devices are required at input pads. The snapback voltage of the NMOS clamp device determines the amount of critical lattice heating inside the ESD diode device connected between the input node and the VDD bus [6]. In [9], they presented data regarding ESD robustness of the chips equipped with the ESD protection circuit utilizing the triple-well diode-string clamps They didn’t explain about transient discharge behavior of the clamp device.

Protection Scheme and Device Structure
DC Characteristics
Transient Discharge Characteristics
Findings
Conclusions
Full Text
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