Abstract

Imprint lithography has been included on the ITRS Lithography Roadmap at the 32 and 22nm nodes. Step and flash imprint lithography (S-FIL™) is a unique method for printing sub-100-nm geometries. Relative to other imprinting processes S-FIL has the advantage that the template is transparent, thereby facilitating conventional overlay techniques. Further, S-FIL provides sub-100-nm feature resolution without the significant expense of multielement, high quality projection optics or advanced illumination sources. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates. With respect to inspection, although defects as small as 70nm have been detected using optical techniques, it is clear that it will be necessary to take advantage of the resolution capabilities of electron beam inspection techniques. This article reports the first systematic study of die-to-database electron beam inspection of patterns that were imprinted using an Imprio 250 system. The die-to-database inspection of the wafers was performed on an NGR2100 inspection system. Metal 1 and logic patterns with dimensions as small as 70nm were inspected. Using a pixel address of 3nm and a defect threshold of 20nm, problem areas in the design of the pattern layout were clearly identified. Ultimately, the most desirable solution is to directly inspect the fused silica template. This article also reports the results on the first experiments of direct inspection fused silica substrates at data rates of 200MHz.

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