Abstract
A new digital robust control law for dc–dc converters is analyzed and implemented in this paper. The robust control QFT technique, which has been successfully used with analog implementations, has been adapted to the digital domain. Concretely, this paper considers the design of a power conditioning unit, which must take into account the uncertainty of the converter, as the conduction mode, the load, the input voltage or the storage elements while assuring that the specifications of a well-known standard are met. The robust control has been implemented by means of a digital device. The sampling frequency is a critical parameter for this kind of system which exhibits fast dynamics. The paper shows a procedure to analyze the minimum sampling frequency of the regulation loop. The procedure consists of transforming an standard analog QFT design to a digital controller by means of an accurate transformation from the s to z domain. After this transformation, we assure the robust stability of the converter by means of the Kharitonov theorem. This approach allows the designer to avoid iterations while finding an appropriate sampling frequency. The experimental prototype has been implemented by means of a FPGA device where the sampling frequency is 100 kHz for a buck power stage with a switching frequency of 200 kHz. The experimental results that are in good agreement with theoretical derivations.
Published Version
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