Abstract

Nanoscale designs suffer from a major bottleneck of device aging that is characterized by its failure mechanism. Device aging may be caused by persistent device delay degradation that finally results in failure. Furthermore, some major factors that affect delay degradation are threshold voltage, temperature, and inputvector patterns. This phenomenon of accelerated aging through delay degradation can be easily exploited by a cyberat tacker who has knowledge of it.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.