Abstract

A Baseband Digital Predistorter design is proposed in this paper for a UHF 8 MHz Power Amplifier (PA) for DVB-T transmitter. A Memory Polynomial (MP) model is considered for the PA characterization and its coefficients are estimated based on Least Square Estimation (LSE) algorithm. The Indirect Learning Architecture (ILA) approach is used to estimate the coefficients of the predistorter. Simulation and FPGA implementation tests hase been carried out by using measured input/output samples of a 110 W Class AB UHF LDMOS PA. Test results showed an improvement of 21 dB in Adjacent Channel Power Ratio (ACPR) and the Normalized Mean Square Error (NMSE) reached −56 dB.

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