Abstract

Improving the technical characteristics of digital signal processing devices is an important problem in many practical tasks. The paper proposes the architecture of a device for two-dimensional filtering in a residue number system (RNS) with moduli of a special type according to the Winograd method. The work carried out the technical parameters theoretical analysis of the proposed filter architecture for different RNS moduli sets by the “unit-gate”-model. In addition, the proposed architecture is compared with known digital filter implementations. The theoretical analysis results showed that the use of the proposed filter architecture makes it possible to increase the signal processing speed by 1.33 – 6.90 times, in comparison with the known device implementations. Also, in the work, the hardware simulation of the proposed filter architecture was performed on FPGA, which showed that the performance of the proposed device is 1.31 – 4.12 times higher than known digital filter architectures. The research results can be used in digital signal processing systems to increase their performance and reduce hardware costs. In addition, the developed architectures can be applied in the development of hardware accelerators for complex digital signals analysis systems.

Highlights

  • Digital signal filtering is widely applied in various areas such as medicine [1], [2], geolocation [3], video surveillance systems [4], quality control in production [5] and many others

  • We propose the architecture of a twodimensional filter with calculations by Winograd method in residue number system (RNS) with moduli of the special type 2α and 2α − 1

  • Theoretical analysis based on the ‘‘unit-gate’’ model of the proposed device parameters showed that RNS usage allows to reduce the device delay by 24.79% – 66.77%, and the area device by 17.59% – 53.67%, compared with the known implementation based on Winograd filtering in positional number system (PNS) [9]

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Summary

Introduction

Digital signal filtering is widely applied in various areas such as medicine [1], [2], geolocation [3], video surveillance systems [4], quality control in production [5] and many others. Performance plays the main role in these practical tasks. Hardware implementation of digital filtering allows increasing the speed of signal processing systems [6]. Improving digital filters technical characteristics is an important challenge. The main computational load during filtering consists in multiply performing the multiplication operation. One of the approaches to increase the speed of a digital filter is to reduce

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