Digital design of discrete exponential bidirectional associative memory

Abstract

The exponential bidirectional associative memory (eBAM) was proved to be a systematically stable high-capacity memory. Considering the implementation of such an eBAM, we adopt the digital logic methodology which is based on several factors, such as scalability and speed. In order to realize the eBAM by digital circuitry only, some special design is required such that the exponential function can be implemented without the loss of operating speed. For example, the exponent 8-to-9 high-speed value generator. Besides, the traditional add/sub accumulator costs too much area when the dimension of patterns is large. A pipelined increment/decrement accumulator is proposed in the design, which can also speed up the addition or subtraction besides the saving of chip area.