Abstract

<span>The multi carrier modulation technique is the most employed PWM technique for cascaded multilevel inverter (CMLI) since this control strategy can be easily extended to higher number of levels of output compared to space vector PWM technique. This paper proposes a modified multi carrier PWM technique for three-phase CMLI. The proposed PWM technique has been implemented using MATLAB Xilinx System Generator, which automatically generate code from system model. The hardware implementation of the three-phase CMLI has been carried out to substantiate the working of proposed PWM technique. Novel FPGA Wavect digital controller is used to generate the PWM pulses, which is a real time simulator and controller. This digital controller improves the accuracy of the hardware implementation. Hardware implementation of proposed control strategy for three-phase CMLI with RL load proves that the proposed PWM technique results in improved power output quality with reduced harmonic components.</span>

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