Abstract

This paper presents multicarrier Phase Disposition PWM (PDPWM) technique with elliptical wave as reference wave for Cascaded Multilevel Inverter (CMLI). The proposed control strategy has been implemented using Xilinx System Generator (XSG) to reduce the complexity of the implementation. The XSG directly synthesis the block sets and generated the HDL code for the target FPGA board. This paper uses a novel FPGA Wavect controller, which a real time digital controller is having sensors to measure the voltage and current of the load connected to inverter. This unique feature simplifies the complexity of hardware implementation and output measurements. In this paper, performance of single phase CMLI with RL-Load is verified by simulation and hardware implementation using proposed modulation technique. The proposed modulation technique results in improved performance of inverter in terms of output voltage, power and power factor for a given load.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call