Abstract
This paper presents a multirate predictive successive approximation register (SAR) analog-to-digital converter (ADC). The main objective is to introduce digital frameworks for resolving the weaknesses of the previous predictive schemes in the context of the SAR ADC. The proposed SAR ADC compensates for the capacitive element mismatches, extends the input signal frequency using an adaptive digital predictive machine (ADPM), and relaxes the speed requirement through multirate implementation of the ADPM. As a consequence, the achievable sampling-rate can also be improved by optimizing the capacitors according to the thermal noise requirement. Behavioral simulation results, based on the Monte Carlo method, are provided for a 12-bit SAR ADC to verify the usefulness of the proposed approach. The simulation results indicate that the means of the spurious-free dynamic range (SFDR) and the signal-to-noise and distortion ratio (SNDR) are 82.3 and 69.1 dB, respectively.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: IEEE Transactions on Circuits and Systems I: Regular Papers
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.