Abstract
A designer-oriented CAD tool which aids in the efficient implementation of MOS VLSI digital filters is presented. Two operation levels are provided: (1) a high level for direct filter analysis; and (2) a bit-parallel level for hardware-oriented simulations. Both levels used the same user specifiable macromodels and act on single or multiple rate digital filters with arbitrary topology. In addition to the direct analyses in the time and frequency domains, new analysis techniques are provided for the thorough characterization of finite-wordlength effects, such as noise, offset, output error, and small-scale limit cycles. These direct analyses avoid time-consuming simulations of digital filters which cannot guarantee proper operation with the actual quantizations. The DIGEST program provides a tool for the actual quantizations, as well as a tool for the verification of the effect of the designer's decisions on the filter characteristics.
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