Abstract
Direct copper (Cu) electrodeposition on a 10-nm atomic-layer-deposited (ALD) tungsten carbide (WC) diffusion barrier layer was investigated for building Cu interconnect in silicon (Si)-based microelectronic devices. The diffusion of Cu reducing species under potentiostatic Cu deposition was characterized according to applied cathodic potential in a neutral electrolyte with a concentration ratio of 1:10 for Cu to iminodiacetic acid (IDA) as a complexing agent. The diffusion-controlled nucleation and growth of Cu thin film on the ALD WC was figured out in relation to diffusion coefficients of Cu reducing species that were calculated from both modified current transient curves and more appropriately electrochemical impedance spectroscopy (EIS) analysis. At the end, the diffusion-controlled Cu fill of trenches with an aspect ratio of 6.3 and 15-nm bottom width was conducted by applying −1.4 V vs Ag/AgCl to an ALD-WC-covered, patterned Si wafer specimen.
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