Abstract
In this paper, RSA cryptosystem was implemented on hardware, then modified to be resistant against Differential Power Analysis attacks by using the Randomized Table Window method. This is the first FPGA realization of an algorithmic countermeasure which makes RSA resistant to power analysis attacks. Modular exponentiation is realized with Montgomery Modular Multiplication. The Montgomery modular multiplier has been realized with Carry-Save Adders. Carry-Save representation has been used throughout the RSA encryption algorithm. The primarily implemented RSA architecture prevents the extraction of the secret key using Simple Power Analysis attacks. When comparing the protected implementation with the unprotected, it can be seen that the total time has increased by 24.2%, while the throughput has decreased by 19.5%.
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