Different noise mechanisms in high-k dielectric gate stacks (Invited Paper)

Abstract

This is a review paper summarizing the recent reports on low-frequency noise in Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with high dielectric constant (high-k) gate oxides. Although several such publications have appeared in the literature recently, the only unified theme among them is that the noise in these high-k gate stacks is considerably higher than that observed on conventional SiO 2 gate oxide transistors. In addition, interface- and bulk-dielectric trap-induced correlated carrier number and mobility fluctuations (Unified Model) seem to be the commonly accepted cause of these fluctuations. This report attempts to compile the published data, make comparisons between different high-k dielectrics with respect to 1/f noise characteristics and reach preliminary conclusions. Since there is still room for improvement in processing of high-k materials for MOSFET applications, the review represents merely a slice in time of the progress made, and not meant to be a fundamental, theoretical review.