Different improvement designs of conventional comparator

Abstract

Comparators play a significant role in the semiconductor industry and have become indispensable in the design of ADC. The delay and energy consumption are two important indicators of the comparator. Many designs have been made to reduce the delay and energy consumption, such as separated gata-biasing cross-coupled transistors for a new latching stage, and pMOS is used to replace nMOS in comparators. This paper analyzes the working principle of the proposed comparators designed for different needs reported on different papers. It compares their simulation results about key data such as delay and energy consumption.