Different approaches to integrate patterned buried CoSi 2 layers in SOI substrates

Abstract

The fabrication of a new silicon on silicide on insulator (SSOI) substrate for the integration of bipolar and CMOS devices on the same wafer is demonstrated. This structure includes a 500 nm thick buried oxide (BOX) and a 90 nm patterned cobalt disilicide film under a 300 nm thick silicon device layer. Two different process flows were used to build the final SSOI substrate. The first process bases on the known BESOI regime and includes wafer grinding and polishing steps. The second technology is a modified variant of the SmartCut TM method, where the SOI substrates are formed using hydrogen implantation, wafer splitting and CMP polishing. The cobalt disilicide was produced using a conventional cobalt salicide process. This process consists of cobalt deposition, two RTA steps and a selective etch. Some modifications in the salicide regime were made to improve the interface between the CoSi 2 and the device silicon.