Dickson basis multiplier with concurrent error detection against fault attacks for lightweight cryptosystems

Abstract

Fault attacks have been proved for efficiently breaking hardware-based elliptic curve cryptosystems. One way for fighting against fault attacks is to design the core multiplier circuit of elliptic curve cryptosystem with concurrent error detection capability. The multiplier with concurrent error detection only outputs its results if no existing error is found. This paper will design a systolic array Dickson basis multiplier with concurrent error detection capability for resisting fault attacks on elliptic curve cryptosystems.