Abstract

In this brief, a new channel length modulation (CLM) extraction method is proposed. The main innovation of this approach is that the extracted value of CLM is not artificially inflated by the contribution of the drain-induced barrier lowering (DIBL), which allows discriminating between the two phenomena. In this method, the transistor gain is measured by using the source-measurement unit in a forced current mode. It is demonstrated that the CLM coefficient can be extracted by the linear regression of the inverse of the gain with respect to the current-over-transconductance ratio, corrected for series resistances. This method is later applied and validated on a planar bulk 65-nm CMOS technology.

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