Abstract

The advent of high surface-to-volume ratio devices has necessitated a revised approach to parameter extraction and process evaluation in field-effect transistor technologies. In this work, active doping concentrations are extracted from the electrical analysis of Si nanowire devices with high surface-to-volume ratios. Nanowire resistance and Si resistivity are extracted, by first extracting and subtracting out the contact resistance. Resistivity (ρ) is selected as the benchmark parameter to compare different doping processes with each other. The impacts of nanowire diameter scaling to 10 nm and of nanowire spacing scaling to <20 nm are extracted for monolayer doping and beam-line ion implantation. Despite introducing significant crystal damage, P beam-line ion implantation beats allyldiphenylphosphine (ADP) P monolayer doping with a SiO2 cap in terms of lower Si resistivity and higher dopant activation, with dependencies on the nanowire width greater than on nanowire spacing. Limitations in ADP P monolayer doping with a SiO2 cap are due to the difficulties in dopant incorporation, as it is based on in-diffusion, and P atoms must overcome a potential barrier on the Si surface.

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